Affiliation Department |
Department of Computer Science
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Title |
Assistant Professor(Moving Out or Retirement) |
MASHIMO Susumu
|
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Papers
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動的スクリプト言語の高効率実行を目的としたプロセッサアーキテクチャの拡張
眞下達, 塩谷亮太, 井上弘士
組込み技術とネットワークに関するワークショップ (ETNET2020) 1 - 11 2020.02
Authorship:Lead author Language:Japanese Publishing type:Research paper (conference, symposium, etc.)
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Energy Efficient Runahead Execution on a Tightly Coupled Heterogeneous Core Reviewed
Susumu Mashimo, Ryota Shioya, Koji Inoue
International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2020) 207 - 216 2020.01
Authorship:Lead author Language:English Publishing type:Research paper (international conference proceedings)
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An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor Reviewed International journal
Susumu Mashimo, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima, Koji Inoue, Ryota Shioya
International Conference on Field Programmable Technology (ICFPT2019) 63 - 71 2019.12
Authorship:Lead author Language:English Publishing type:Research paper (international conference proceedings)
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VMOR: Microarchitectural Support for Operand Access in an Interpreter Reviewed
Susumu Mashimo, Ryota Shioya, Koji Inoue
IEEE Computer Architecture Letters 17 ( 2 ) 217 - 220 2018.08
Authorship:Lead author Language:English Publishing type:Research paper (scientific journal) Publisher:IEEE
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A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath Reviewed International journal
Makoto Saitoh, Elsayed A. Elsayed, Thiem Van Chu, Susumu Mashimo, Kenji Kise
IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM2018) 197 - 204 2018.04
Language:English Publishing type:Research paper (international conference proceedings)
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High-Performance Hardware Merge Sorter Reviewed International journal
Susumu Mashimo, Thiem Van Chu, Kenji Kise
IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM2017) 1 - 8 2017.04
Authorship:Lead author Language:English Publishing type:Research paper (international conference proceedings)
DOI: 10.1109/FCCM.2017.19
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Cost-Effective and High-Throughput Merge Network Architecture for the Fastest FPGA Sorting Accelerator Reviewed International journal
Susumu Mashimo, Thiem Van Chu, Kenji Kise
ACM SIGARCH Computer Architecture News 44 ( 4 ) 8 - 13 2017.01
Authorship:Lead author Language:English Publishing type:Research paper (international conference proceedings)
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FPGAソーティングアクセラレータのためのマージネットワークの改良
齋藤誠, 眞下達, Thiem Van Chu, 吉瀬謙二
信学技報 RECONF2016-42 13 - 18 2016.11
Language:Japanese Publishing type:Research paper (conference, symposium, etc.)
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Verilog HDLで記述するRISC-V命令セットのアウトオブオーダ実行プロセッサ
藤浪将, 眞下達, 吉瀬謙二
情報処理学会第78回全国大会 2016.03
Language:Japanese Publishing type:Research paper (conference, symposium, etc.)
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Fast Merge Network for Sorting on FPGA
Susumu Mashimo, Yuki Matsuda, Kenji Kise
情報処理学会第78回全国大会 2016.03
Authorship:Lead author Language:English Publishing type:Research paper (conference, symposium, etc.)